[Ziguang Tongchuang Domestic FPGA Tutorial] [Chapter 20] Ad9767 Dual Channel Sine Wave Generation Ro

This original tutorial is created by Xinyi Electronic Technology (Shanghai) Co., Ltd. (alinx), and the copyright belongs to our company. If you need to reprint it, you need to authorize and indicate the source( http://www.alinx.com )。

Applicable to board model:

PGL22G/PGL12G

1. Introduction to the experiment

In this experiment, an9767 module is used. The module used in the experiment adopts ad9767 chip of analog devices, which supports independent dual channel, 14 bit and 125msps digital to analog conversion. In the tutorial, the module is connected with FPGA development board to output dual channel 14 bit sine wave, and then the waveform of the output sine wave is viewed through oscilloscope.

The physical photos of an9767 module are as follows:

Detailed parameters of an9767 dual channel Da module:

DA conversion chip: ad9767;

Number of channels: 2 channels;

DA conversion bits: 14bit;

Da update rate: 125 MSPs;

Output voltage range: - 5V 5V;

Number of module PCB layers: 4 layers, independent power supply layer and GND layer;

Module interface: 40 pin 2.54mm spacing row seat, downward direction;

Operating temperature: - 40 ° 85 ° the chips used in the module meet the industrial temperature range

Output interface: 2-way BNC analog output interface (BNC line can be directly connected to oscilloscope);

2. Experimental principle

2.1 principle block diagram of an9767 module

The principle design block diagram of an9767 module is as follows:

2.2 introduction to ad9767 chip

Ad9767 is a dual port, high-speed, dual channel, 14 bit CMOS DAC. The chip integrates two high-quality txdacs ® The core, a reference voltage source and digital interface circuit are packaged in 48 pin small LQFP. The device provides excellent AC and DC performance while supporting update rates of up to 125 MSPs. The functional block diagram of ad9767 is as follows:

2.3 current voltage conversion and amplification

The two Da outputs of ad9767 are current outputs iouta and ioutb in the form of complement. When ad9767 digital input is full scale (14 bit data of DAC input is high), iouta outputs full scale current output 20mA. Ioutb output current is 0ma. The relationship between specific current and DAC data is shown in the following formula:

Ioutfs = 32 x Iref. In the design of an9767 module, the value of Iref is determined by the value of resistor R16. If R16 = 19.2k, the value of Iref is 0.625ma. Thus, the value of ioutfs is 20mA.

The output current of ad9767 is converted into a voltage of - 1V 1V through the first stage operational amplifier ad6045. The specific conversion circuit is shown in the figure below:

The - 1V 1V voltage converted by the first stage operational amplifier is converted to a higher amplitude voltage signal through the second stage operational amplifier. The amplitude of this operational amplifier can be changed by adjusting the adjustable resistance on the board. Through the second stage operational amplifier, the output range of analog signal is up to - 5V 5V.

The following table is the voltage comparison table after digital input signal and output of operational amplifiers at all levels:

The digital interface of ad9767 chip can be configured into dual mode or interleaved mode through the mode pin (mode) of the chip. In the design of an9767 module, ad9767 chip works in dual port mode, and the dual channel Da digital input interface is independent. The data sequence diagram of dual mode is shown in the following figure:

The Da data to the ad9767 chip is input to the chip through the rising edge of the clock CLK and the write signal wrt for DA conversion.

3. Program design

The Da test program of an9767 module is provided in the routine, and the output of sine wave signal is realized through an9767 module.

The sine wave test program reads the sine wave data stored in a ROM inside the FPGA, and then outputs the sine wave data to the an9767 module for digital to analog conversion, so as to obtain the sine wave analog signal. The schematic diagram of sine wave test procedure is as follows:

3.1 generate ROM initialization file

In the program, we will use a ROM to store 1024 14 bit sine wave data. First, we need to prepare the ROM initialization file. The following is the method of generating sine wave ROM data file:

Find the tool under the software tools and driver folder, and its icon is as follows:

Double click. Exe to open the tool. The interface is as follows:

2. You can select the waveform according to your needs. In this routine, select sine wave, data length 1024, data bit width 14, and other defaults:

3. Click Save to save the generated data file to the project directory file (note the saved file type. DAT):

4. Click OK after saving to close the tool

Save the. Dat file to the generated ROM IP core. It has been introduced in the character display experiment tutorial and will not be repeated here.

3.2 dual channel sine wave generation procedure

The program generates 125m Da output clock through a PLL IP, and then circularly reads 1024 data stored in ROM and outputs them to the Da data lines of channel 1 and channel 2 at the same time. The program can choose to output sine waves of different frequencies by adding 1, 4, or 128 to the address.

4. Experimental phenomena

1) Insert the an9767 module into the expansion port J8 of the development board, pay attention to the alignment of the 1 pin, do not insert it wrong or deviate, and do not operate with electricity.

2) Use the BNC line provided by us to connect the output of an9767 to the input of the oscilloscope, as shown in the figure below. Then power on the development board and download the program to observe the waveform of the analog signal output from the Da module from the oscilloscope.

3) The sine wave seen on the oscilloscope is as follows:

4) We can change the address in the program to 4 as follows. In this way, the output points of a sine wave are 256, and the frequency of the output sine wave will be increased by 4 times:

After the program is modified and the FPGA is downloaded again, the frequency of the sine wave becomes higher, and the waveform displayed by the oscilloscope is as follows:

The user can also change the amplitude of the output waveform of the two channels by adjusting the adjustable resistance on the an9767 module.

[Ziguang Tongchuang Domestic FPGA Tutorial] [Chapter 20] Ad9767 Dual Channel Sine Wave Generation Ro 1

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